Serial interfaces with shadow registers, and associated systems, devices, and methods
US11675589B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2021 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Sep 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Serial interfaces with shadow registers, and associated systems, devices, and methods are described herein. In one embodiment, a serial interface is an IEEE 1500 interface, such as of an interface die of a high bandwidth memory (HBM) device. The IEEE 1500 interface includes (a) a primary wrapper data register (WDR) configured to store first information received in a first wrapper serial input (WSI) signal, (b) a shadow WDR configured to store second information received in a second WSI signal, and (c) a multiplexer. The multiplexer is configured to (i) receive the first information from the primary WDR, (ii) receive the second information from the shadow WDR, and (iii) output the first information or the second information based at least in part on a control signal input into the multiplexer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.