Memory system, memory controller, and operation method of memory system
US11675712B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 4, 2020 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Sep 4, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present disclosure relate to a memory system, a memory controller, and an operation method of a memory system. According to embodiments of the present disclosure, the memory system, before updating a mapping table which includes mapping information between logical addresses and physical addresses, may assign a portion of a map cache area for caching a plurality of map segments in the mapping table as a map update area for updating the mapping table, and may load a subset of the plurality of map segments to the map update area. Accordingly, it is possible to quickly update a mapping table and to optimize update performance for a mapping table within a limit that guarantees caching performance to a predetermined level or higher.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.