Patent · US Active

Enhanced low-priority arbitration

US11675718B2 · kind B2 · utility

1Cited by

5References

20Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Eric Christopher Morton · Austin, US
Pravesh Gupta · Bengaluru, IN
Bryan P. Broussard · Austin, US
Li Ou · Dongguan, CN

Key dates

Filing date	Mar 26, 2021
Grant date	Jun 13, 2023
Priority date	—
Expiry date	Mar 26, 2041

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computing system may implement a low priority arbitration interrupt method that includes receiving a message signaled interrupt (MSI) message from an input output hub (I/O hub) transmitted over an interconnect fabric, selecting a processor to interrupt from a cluster of processors based on arbitration parameters, and communicating an interrupt service routine to the selected processor, wherein the I/O hub and the cluster of processors are located within a common domain.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.