Integrated circuit (IC) package with stacked die wire bond connections, and related methods
US11676905B2 · kind B2 · utility
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Key dates
| Filing date | Jan 26, 2021 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Jan 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) package with stacked die wire bond connections has two stacked IC dies, where a first die couples to a metallization structure directly and a second die stacked on top of the first die connects to the metallization structure through wire bond connections. The IC dies are coupled to one another through an interior metal layer of the metallization structure. Vias are used to couple to the interior metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.