Electronic device including ferroelectric layer
US11677025B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2021 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Oct 28, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6739
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a ferroelectric layer arranged on a channel region and a gate electrode arranged on the ferroelectric layer. The ferroelectric layer includes a plurality of first oxide monolayers and a second oxide monolayers that is arranged between the substrate and the gate electrode and include a material different from a material of the first oxide monolayers. The first oxide monolayers include oxide monolayers that are alternately formed and include materials different from one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.