One-time programmable memory read-write circuit
US11682466B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2020 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Oct 14, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A read-write circuit of a one-time programmable memory, including: an antifuse array including: n*n antifuse units, between a first node and a second node, the control terminals of switching elements in the antifuse units coupled to AND signals of different word line signals and bit line signals; the first switching device and the first capacitor connected in parallel between the second node and the second voltage source; the reference array including reference resistance and reference switching elements connected in series between the first and third nodes, the reference switching element's control end coupled to OR signals of the n*n AND signals; the second switching device and the second capacitor connected in parallel between the third node and second voltage source; a comparison circuit's first input terminal coupled to the second node and second input terminal coupled to the third node. The circuit has simpler connections, smaller area, and higher reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.