Patent · US Active

Package having a substrate comprising surface interconnects aligned with a surface of the substrate

US11682607B2 · kind B2 · utility

7Cited by

12References

16Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Hong Bok We · San Diego, US
Marcus HSU · San Diego, US
Aniket PATIL · Tempe, US

Key dates

Filing date	Feb 1, 2021
Grant date	Jun 20, 2023
Priority date	—
Expiry date	Jun 25, 2041

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2224/1412
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A package that includes a substrate and an integrated device. The substrate includes at least one dielectric layer, a plurality of interconnects comprising a first material, and a plurality of surface interconnects coupled to the plurality of interconnects. The plurality of surface interconnects comprises a second material. A surface of the plurality of surface interconnects is planar with a surface of the substrate. The integrated device is coupled to the plurality of surface interconnects of the substrate through a plurality of pillar interconnects and a plurality of solder interconnects.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.