Standard cell architecture with power tracks completely inside a cell
US11682664B2 · kind B2 · utility
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25Claims
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Key dates
| Filing date | Jan 31, 2019 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Jun 3, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit structure includes a cell on a metal level, the cell defined by a cell boundary. A plurality of substantially parallel interconnect lines are inside the cell boundary. A first power track and a second power track are both dedicated to power and are located completely inside the cell boundary without any power tracks along the cell boundary on the metal level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.