Semiconductor structure and manufacturing method of the same
US11683991B2 · kind B2 · utility
1Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2020 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Dec 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
Abstract
The present disclosure provides a method for manufacturing semiconductor structure, including forming an insulation layer, forming a first via trench in the insulation layer, forming a barrier layer in the first via trench, forming a bottom electrode via in the first via trench, forming a magnetic tunneling junction (MTJ) layer above the bottom electrode via, and performing an ion beam etching operation, including patterning the MTJ layer to form an MTJ and removing a portion of the insulation layer from a top surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.