Amplifier offset cancelation
US11688437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Sep 22, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An amplifier system includes a differential amplifier and a calibration circuit. In response to a calibration operation, the calibration circuit generates a calibration value based on a test output signal generated by the differential amplifier circuit using a test input signal. The calibration value may be used to adjust loading of internal nodes of the differential amplifier circuit to compensate for imbalance in the differential amplifier circuit resulting from variation in manufacturing. By compensating for the imbalance, the offset of the differential amplifier may be reduced, allowing resolution of smaller differential voltages, thereby improving the performance of circuits employing the differential amplifier circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.