Semiconductor devices having a plurality of offsets in leads supporting stacked components and methods of manufacturing thereof
US11694946B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2021 |
| Grant date | Jul 4, 2023 |
| Priority date | — |
| Expiry date | May 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one example, a semiconductor device includes a substrate having leads that include lead terminals, lead steps, and lead offsets extending between the lead steps so that at least some lead steps reside on different planes. A first electronic component is coupled to a first lead step side and includes a first electronic component first side, and a first electronic component second side opposite to the first electronic component first side. A second electronic component is coupled to a second lead step side, and includes a second electronic component first side, and a second electronic component second side opposite to the second electronic component first side. An encapsulant encapsulates the first electronic component, the second electronic component, and portions of the substrate. The lead terminals are exposed from a first side of the encapsulant. Other examples and related methods are also disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.