Electronic device package and method of manufacturing the same
US11699654B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2021 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Sep 14, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/05569
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device package includes an encapsulated electronic component, a redistribution layer (RDL) and a conductive via. The RDL is disposed above the encapsulated electronic component. The RDL includes a circuit layer comprising a conductive pad including a pad portion having a curved edge and a center of curvature, and an extension portion protruding from the pad portion and having a curved edge and a center of curvature. The circuit layer further includes a dielectric layer above the RDL. The conductive via is disposed in the dielectric layer and connected to the conductive pad of the RDL. A center of the conductive via is closer to the center of curvature of the edge of the extension portion than to the center of curvature of the edge of the pad portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.