Method for manufacturing a semiconductor device using a support layer to form a gate structure
US11700722B2 · kind B2 · utility
0Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2021 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Nov 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0335
Abstract
A semiconductor device manufacturing method according to the exemplary embodiments of the disclosure includes patterning a substrate, thereby forming an active pattern, forming a trench penetrating the active pattern, forming a support layer covering the trench, forming a first opening at the support layer, forming a gate electrode layer filling the trench through the first opening, and forming a bit line structure electrically connected to the active pattern. The support layer includes a base portion covering a top surface of the active pattern, and a support disposed in the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.