Semiconductor device
US11700775B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2020 |
| Grant date | Jul 11, 2023 |
| Priority date | — |
| Expiry date | Sep 21, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.