Patent · US Active

Host side caching security for flash memory

US11704254B2 · kind B2 · utility

0Cited by

8References

20Claims

0Family size

Assignee

Micron Technology, Inc. · US

Inventors

Zoltan Szubbocsev · Haimhausen, DE
Alberto Troia · Munich, DE
Federico Tiziani · Muggiò, IT

Key dates

Filing date	May 13, 2021
Grant date	Jul 18, 2023
Priority date	—
Expiry date	Jul 19, 2041

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various examples are directed to systems and methods for managing a memory system. The memory system may generate a first encrypted physical address using a first clear physical address. The memory system may generate a first encrypted logical-to-physical (L2P) pointer indicating the first logical address and a first encrypted physical address. The memory system may send the first encrypted L2P pointer to a host device for storage at a host memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.