Patent · US Active

Complexity-reduced simulation of circuit reliability

US11704462B2 · kind B2 · utility

0Cited by

0References

16Claims

0Family size

Assignees

IMEC VZW · BE
Katholieke Universiteit Leuven · BE

Inventors

Pieter Weckx · Bunsbeek, BE
Dimitrios Rodopoulos · Leuven, BE
Benjamin Kaczer · Leuven, BE
Francky Catthoor · Temse, BE

Key dates

Filing date	Jul 25, 2019
Grant date	Jul 18, 2023
Priority date	—
Expiry date	Jan 22, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/10
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A system and method for simulating an electronic circuit is disclosed. The method includes creating a finite set of circuit or device parameter points selected from within an n-dimensional parameter space. The method includes determining, for each circuit or device parameter point of the set, a corresponding response value of the performance metric and a corresponding probability of occurrence. The method includes determining, for a predetermined value of the performance metric, the total probability of occurrence.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.