Mirror-image chips on a common substrate
US11705427B2 · kind B2 · utility
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22Claims
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Assignee
Inventor
Key dates
| Filing date | Oct 5, 2021 |
| Grant date | Jul 18, 2023 |
| Priority date | — |
| Expiry date | Jan 19, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a substrate having contact pads disposed thereon and traces interconnecting the contact pads. A first integrated circuit (IC) die is mounted on the substrate and includes a predefined set of circuit components arranged on the first IC die in a first geometrical pattern, which is non-symmetrical under reflection about a given axis in a plane of the die. A second IC die is mounted on the substrate and includes the predefined set of circuit components arranged on the second IC die in a second geometrical pattern, which is a mirror image of the first geometrical pattern with respect to the given axis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.