Patent · US Active

Interconnection structure of system on wafer and PCB base on TSV process and method for manufacturing the same

US11705437B1 · kind B1 · utility

1Cited by

0References

9Claims

0Family size

Assignee

ZHEJIANG LAB · CN

Inventors

Qingwen Deng · Hangzhou City, CN
Kun Zhang · Hubei, CN
Shunbin Li · Hangzhou City, CN
Ruyun Zhang · Hangzhou City, CN

Key dates

Filing date	Jan 19, 2023
Grant date	Jul 18, 2023
Priority date	—
Expiry date	Jan 19, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH05K1/181
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An interconnection structure of a system on wafer and a PCB based on a TSV process and a method for manufacturing the same. The structure comprises a bottom structural part and a top structural part, the upper surface of the bottom structural part is provided with a plurality of positioning holes; the lower surface of the top structural part is provided with positioning pins; the upper surface of the bottom structural part is provided with a bottom groove, and a system on wafer is arranged in the bottom groove; the lower surface of the system on wafer is connected with the bottom groove; the lower surface of the top structural part is provided with a top groove, and a PCB preformed die is connected in the top groove, and the other end of the PCB preformed die is connected with the system on wafer by an elastic connector.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.