Patent · US Active

Power and temperature driven clock throttling

US11709522B1 · kind B1 · utility

1Cited by
4References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 16, 2020
Grant dateJul 25, 2023
Priority date
Expiry dateSep 19, 2040

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Embodiments herein describe techniques for managing power consumption and temperature in an electronic circuits or integrated chips driven by clock signals (collectively referred to as “cards”) by throttling the clock signals on those cards. The cards often allow users to implement customized hardware acceleration functions via Field Programmable Gate Arrays or the like, which can lead to variable workloads on different cards (or regions of individual cards) based on the customized functionality. By throttling the clock signal based on continuously monitored power consumption or temperature, the user is enabled to use the card more aggressively (e.g., based on average rather than worst-case power consumption), and the card automatically throttles operations when power consumption or temperature exceeds operational thresholds.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.