Fan-out packaging method and fan-out packaging plate
US11710646B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2018 |
| Grant date | Jul 25, 2023 |
| Priority date | — |
| Expiry date | Jan 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan-out packaging method includes: prepare circuit patterns on one side or both sides of a substrate; install electronic parts on one side or both sides of the substrate; prepare packaging layers on both sides of the substrate; the packaging layers on both sides of the substrate package the substrate, the circuit patterns, and the electronic parts, the packaging layers being made of a thermal-plastic material; wherein the substrate is provided with a via hole; both sides of the substrate are communicated by means of the via hole; a part of the packaging layers penetrate through the via hole when the packaging layers are prepared on both sides of the substrate; and the packaging layers on both sides of the substrate are connected by means of the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.