Fabricating method of semiconductor device with exposed input/output pad in recess
US11710730B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2021 |
| Grant date | Jul 25, 2023 |
| Priority date | — |
| Expiry date | Sep 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/9202
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabricating method of a semiconductor device is provided. A temporary semiconductor structure is provided. The temporary semiconductor structure includes a temporary substrate and a conductive layer, the temporary substrate has a first surface, the conductive layer is disposed on the first surface of the temporary substrate, and the conductive layer includes one or more first trace. Then, a recess is formed in the temporary semiconductor structure to form a first semiconductor structure and a first substrate. The recess penetrates through the first substrate and expose the one or more first trace. Thereafter, an input/output pad is formed in the recess and on the one or more first trace.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.