Automated timing closure on circuit designs

US11714950B2 · kind B2 · utility

Assignee

• XILINX, INC. · US

Inventors

• Veeresh Pratap Singh · Hyderabad, IN
• Meghraj Kalase · Hyderabad, IN
• John Blaine · Weybridge, GB
• Srinivasan Dasasathyan · Secunderabad, IN
• Padmini Gopalakrishnan · Sunnyvale, US
• Frederic Revenu · San Carlos, US
• Veena Johar · Hyderabad, IN
• Pawan Kumar Singh · Los Altos, US
• Mohit Sharma · Hyderabad, IN
• Kameshwar Chandrasekar · Hyderabad, IN

Key dates

• Filing date: Jul 22, 2021
• Grant date: Aug 1, 2023
• Expiry date: Dec 2, 2041

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2119/12
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Processing a circuit design includes stabilizing the circuit design by a design tool that performs one or more iterations of implementation, optimization assessment, optimization, and stability assessment until a threshold stability level is achieved. The design tool determines, in response to satisfaction of the threshold stability level, different strategies based on features of the circuit design and likelihood that use of the strategies would improve timing. Each strategy includes parameter settings for the design tool. The design tool executes multiple implementation flows using different sets of strategies to generate alternative implementations. One implementation of the alternative implementations nearest to satisfying a timing requirement is selected. The selected implementation is iteratively optimized to satisfy the timing requirement, while restricting changes to placement of cells and nets on a critical path of the one implementation to less than a threshold portion of cells and nets on the critical path.