Trim level adjustments for memory based on data use
US11715511B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2021 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Jan 7, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/4062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes determining a quantity of refresh operations performed on a block of a memory device of a memory sub-system and determining a quantity of write operations and a quantity of read operations performed to the block. The method also includes determining the block is read dominant using the quantity of write operations and the quantity of read operations and determining whether the quantity of refresh operations has met a criteria. The method further includes, responsive to determining that the block is read dominant and that the quantity of refresh operations has met the criteria, modifying trim settings used to operate the block of the memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.