Semiconductor storage device having first and second memory strings formed on opposite sides of the same pillar and method of performing a read operation therein
US11715527B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2021 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Aug 26, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor storage device includes a semiconductor pillar, a first string having first memory cells connected in series, first word lines connected to the first memory cells, a second string having second memory cells connected in series, and second word lines connected to the second memory cells. Each of the first memory cells faces, and shares a channel in the semiconductor pillar with, one of the second memory cells. When reading data of the k-th first memory cell, a voltage of the first word line connected to the k-th first memory cell reaches a first voltage at a first timing, and a voltage of the second word line connected to at least one of the second memory cells other than the k-th second memory cell in the second string facing the k-th first memory cell reaches the first voltage at a second timing that is later than the first timing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.