Delay-tracking biasing for voltage-to-time conversion
US11716089B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2022 |
| Grant date | Aug 1, 2023 |
| Priority date | — |
| Expiry date | Mar 16, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/0682
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A biasing scheme for a voltage-to-time converter (VTC). An example biasing circuit generally includes a reference current source; a feedback loop current source; an amplifier having a first input coupled to a target voltage node, having a second input, and having an output coupled to a control input of the reference current source and to a control input of the feedback loop current source; a first capacitive element; a first switch coupled in parallel with the first capacitive element; a second switch coupled between the feedback loop current source and the first capacitive element; and a third switch coupled between the first capacitive element and the second input of the amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.