Patent · US Active

Integrated device comprising pillar interconnect with cavity

US11721656B2 · kind B2 · utility

0Cited by

0References

25Claims

0Family size

Assignee

QUALCOMM Incorporated · US

Inventors

Yujen CHEN · Chongqing, CN
Hung-Yuan Hsu · Hsinchu, TW
Dongming He · Gilbert, US

Key dates

Filing date	Aug 23, 2021
Grant date	Aug 8, 2023
Priority date	—
Expiry date	Oct 22, 2041

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3841
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A package comprising a substrate and an integrated device coupled to the substrate through a plurality of pillar interconnects and a plurality of solder interconnects. The plurality of pillar interconnects includes a first pillar interconnect comprising a first cavity. The plurality of solder interconnects comprises a first solder interconnect located in the first cavity of the first pillar interconnect. A planar cross section that extends through the first cavity of the first pillar interconnect may comprise an O shape. The first pillar interconnect comprises a first pillar interconnect portion comprising a first width; and a second pillar interconnect portion comprising a second width that is different than the first width.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.