Thermal dissipation and shielding improvement using merged PCB bottom copper post
US11723143B1 · kind B1 · utility
0Cited by
9References
20Claims
0Family size
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Key dates
| Filing date | Apr 27, 2022 |
| Grant date | Aug 8, 2023 |
| Priority date | — |
| Expiry date | Apr 27, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10318
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system and method for dissipating heat from a package and reducing interference between signaling pins is disclosed. The system includes a circuit substrate that includes a dielectric layer and at least one metal layer having an external surface. A plurality of metal posts is disposed on the external surface that function to a least one of dissipate heat from the circuit substrate, shield interfering signals between the signaling pins, and interact with mounting substrates on corresponding componentry. One or more metal posts are merged, increasing the interference shielding and heat dissipation functions of the metal posts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.