Fabrication method of memory device
US11723295B2 · kind B2 · utility
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10Claims
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Key dates
| Filing date | Dec 15, 2021 |
| Grant date | Aug 8, 2023 |
| Priority date | — |
| Expiry date | Dec 15, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/841
Abstract
A method for fabricating memory device includes: providing a substrate having a bottom electrode layer therein, forming a buffer layer and a mask layer on the buffer layer over the substrate, in contact with the bottom electrode layer, performing an advanced oxidation process on a sidewall of the buffer layer to form a resistive layer, which surrounds the whole sidewall of the buffer layer and extends upward vertically from the substrate, and forming, over the substrate, a noble metal layer and a top electrode layer on the noble metal layer, fully covering the resistive layer and the mask layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.