Apparatuses and methods including dice latches in a semiconductor device
US11727967B2 · kind B2 · utility
1Cited by
1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2022 |
| Grant date | Aug 15, 2023 |
| Priority date | — |
| Expiry date | Jan 13, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses and methods including dice latches in a semiconductor device are disclosed. Example dice latches have a circuit arrangement that include a reduced number of circuits, such as transistors, and provides a compact layout. Operation of example dice latches and other dice latches may be controlled by separately provided control signals for loading and latching of data, and in some examples, for a reset operation. Example layouts include circuit elements aligned along a direction with at least one other circuit element offset from the other aligned circuit elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.