Capacitor die embedded in package substrate for providing capacitance to surface mounted die
US11728294B2 · kind B2 · utility
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22Claims
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Key dates
| Filing date | Nov 3, 2021 |
| Grant date | Aug 15, 2023 |
| Priority date | — |
| Expiry date | Nov 3, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/185
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package substrate is disclosed. The package substrate includes a die package in the package substrate located at least partially underneath a location of a power delivery interface in a die that is coupled to the surface of the package substrate. Connection terminals are accessible on a surface of the die package to provide connection to the die that is coupled to the surface of the package substrate. Metal-insulator-metal layers inside the die package are coupled to the connection terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.