Patent · US Active

Response-based interconnect control

US11734203B2 · kind B2 · utility

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1References
45Claims
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Assignee

Inventors

Key dates

Filing dateDec 20, 2021
Grant dateAug 22, 2023
Priority date
Expiry dateFeb 1, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04L47/39
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Described apparatuses and methods enable a receiver of requests, such as a memory device, to control the arrival of future requests using a credit-based communication protocol. A transmitter of requests can be authorized to transmit a request across an interconnect responsive to possession of a credit. If the transmitter exhausts its credits, the transmitter waits until a credit is returned before transmitting another request. The receiver can manage credit returns based on how many responses are present in a response queue. The receiver can change a rate at which the credit returns are transmitted by changing a size of an interval of responses that are being transmitted, with one credit being returned per interval. This can slow the rate of credit returns while the response queue is relatively more filled. The rate adjustment can decrease latency by reducing an amount of requests or responses that are pooling in backend components.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.