Semiconductor device
US11735640B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2021 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Dec 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/013
Abstract
A semiconductor device including: a substrate that includes a first active region and a second active region; a first source/drain pattern on the first active region; a second source/drain pattern on the second active region; a separation dielectric pattern on the substrate between the first source/drain pattern and the second source/drain pattern; and a first contact pattern on the first source/drain pattern, wherein the first contact pattern includes: a first metal pattern; a first barrier pattern between the first metal pattern and the first source/drain pattern; and a second barrier pattern between the first barrier pattern and the first source/drain pattern, wherein the first barrier pattern contacts the separation dielectric pattern and extends along a sidewall of the first metal pattern adjacent to the separation dielectric pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.