Supports for a semiconductor structure and associated wafers for an optoelectronic device
US11735685B2 · kind B2 · utility
0Cited by
0References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 26, 2021 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Jul 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/187
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for preparing a crystalline semiconductor layer in order for the layer to be provided with a specific lattice parameter involves a relaxation procedure that is applied for a first time to a first start donor substrate in order to obtain a second donor substrate. Using the second donor substrate as the start donor substrate, the relaxation procedure is repeated for a number of times that is sufficient for the lattice parameter of the relaxed layer to be provided with the specific lattice parameter. A set of substrates may be obtained by the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.