Prefetch buffer of memory sub-system
US11741013B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 19, 2022 |
| Grant date | Aug 29, 2023 |
| Priority date | — |
| Expiry date | May 19, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments described herein provide for using a prefetch buffer with a cache of a memory sub-system to store prefetched data (e.g., data prefetched from the cache), which can increase read access or sequential read access of the memory sub-system over that of traditional memory sub-systems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.