Reinforcement learning-based adjustment of digital circuits
US11741282B2 · kind B2 · utility
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Key dates
| Filing date | Jan 19, 2022 |
| Grant date | Aug 29, 2023 |
| Priority date | — |
| Expiry date | Jan 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for adjusting a digital circuit design are described. For example, the method may include selecting a first path in the digital circuit design. The first path includes a plurality of gates. The method also includes generating a k-hop neighborhood graph of the first path, encoding the k-hop neighborhood graph into a state vector, and applying a machine learning model to the state vector to determine an adjustment to be made on a first gate of the plurality of gates. The method further includes changing the first gate based on the adjustment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.