Sacrificial redistribution layer in microelectronic assemblies having direct bonding

US11749628B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Adel A. Elsherbini · Chandler, US
• Veronica Strong · Hillsboro, US
• Shawna M. Lift · Scottsdale, US
• Brandon M. Rawlings · Chandler, US
• Jagat Shakya · Hillsboro, US
• Johanna M. Swan · Scottsdale, US
• David Craig · Albany, US
• Jeremy Alan Streifer · Beaverton, US
• Brennen Mueller · Portland, US

Key dates

• Filing date: Nov 9, 2022
• Grant date: Sep 5, 2023
• Expiry date: Nov 9, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/18161
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include a first microelectronic component having a first direct bonding region, wherein the first direct bonding region includes first metal contacts and a first dielectric material between adjacent ones of the first metal contacts; a second microelectronic component having a second direct bonding region, wherein the second direct bonding region includes second metal contacts and a second dielectric material between adjacent ones of the second metal contacts, wherein the first microelectronic component is coupled to the second microelectronic component by interconnects, and wherein the interconnects include individual first metal contacts coupled to respective individual second metal contacts; and a void between an individual first metal contact that is not coupled to a respective individual second metal contact, wherein the void is in the first direct bonding region.