TSV as pad
US11749645B2 · kind B2 · utility
7Cited by
222References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2019 |
| Grant date | Sep 5, 2023 |
| Priority date | — |
| Expiry date | Jun 12, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06544
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Representative techniques and devices including process steps may be employed to mitigate the potential for delamination of bonded microelectronic substrates due to metal expansion at a bonding interface. For example, a through-silicon via (TSV) may be disposed through at least one of the microelectronic substrates. The TSV is exposed at the bonding interface of the substrate and functions as a contact surface for direct bonding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.