Inventor · Santa Clara, CA, US

Bongsub Lee

17Patents

4h-index

19Co-inventors

49Inventor score

Filing activity: Apr 30, 2015 → Aug 17, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US10998292B2	Offset pads over TSV	Electricity	132	Active
US11004757B2	Bonded structures	Electricity	100	Active
US11393779B2	Large metal pads over TSV	Electricity	49	Active
US11749645B2	TSV as pad	Electricity	7	Active
US11955393B2	Structures for bonding elements including conductive interface features	Electricity	3	Active
US11728313B2	Offset pads over TSV	Electricity	2	Active
US9847238B2	Fan-out wafer-level packaging using metal foil lamination	Electricity	2	Active
US11955445B2	Metal pads over TSV	Electricity	2	Active
US9543277B1	Wafer level packages with mechanically decoupled fan-in and fan-out areas	Electricity	2	Active
US12243851B2	Offset pads over TSV	Electricity	1	Active
US9646946B2	Fan-out wafer-level packaging using metal foil lamination	Electricity	1	Active
US10008469B2	Wafer-level packaging using wire bond wires in place of a redistribution layer	Electricity	1	Active
US9502372B1	Wafer-level packaging using wire bond wires in place of a redistribution layer	Electricity	0	Active
US10304803B2	Nanoscale interconnect array for stacked dies	Electricity	0	Active
US9859234B2	Methods and structures to repair device warpage	Electricity	0	Active
US10600761B2	Nanoscale interconnect array for stacked dies	Electricity	0	Active
US12205926B2	TSV as pad	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.