Semi-embedded trace structure with partially buried traces
US11764076B2 · kind B2 · utility
0Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2020 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Dec 18, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/16238
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Certain aspects of the present disclosure generally relate to an embedded trace substrate with partially buried traces, methods for fabrication thereof, and apparatus comprising such an embedded trace substrate. One example method of fabricating an embedded trace substrate generally includes creating a pattern of conductive traces above a dielectric layer and mechanically pressing on the pattern of conductive traces such that lower portions of the conductive traces are buried in the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.