Moat coverage with dielectric film for device passivation and singulation
US11764110B2 · kind B2 · utility
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3References
19Claims
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Assignee
Inventor
Key dates
| Filing date | Apr 29, 2020 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Jun 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Techniques are described for the use of moats for isolating and singulating semiconductor devices formed on a wafer. Described techniques use dielectric films, such as an oxide-nitride film, to coat moat surfaces and provide passivation. The dielectric films may form a junction with a metal contact layer, to reduce electrical overstress that may otherwise occur in the resulting semiconductor devices. To ensure coverage of the moat surfaces, spray coating of a positive photoresist may be used.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.