Metal space centered standard cell architecture to enable higher cell density
US11764219B2 · kind B2 · utility
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25Claims
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Key dates
| Filing date | Dec 2, 2019 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Jan 17, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/981
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments disclosed herein include a semiconductor device. In an embodiment, the semiconductor device comprises a substrate, and a cell on the substrate. In an embodiment, the cell comprises a plurality of transistors over the substrate, and a first metal layer over the plurality of transistors. In an embodiment, the first metal layer comprises a first power line, wherein a width of the first power line is entirely within the cell, a second power line, wherein a width of the second power line is entirely within the cell, and a plurality of signal lines between the first power line and the second power line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.