Method of fabricating contact pads for electronic substrates
US11765826B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 2021 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Dec 6, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/095
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Electronic substrates, contact pads for electronic substrates, and related methods are disclosed. Electronic substrates may include an electrically conductive layer that forms at least one contact pad and at least one metal trace on a non-conductive layer. The contact pads are arranged with greater thicknesses or heights above the non-conductive layer than the metal traces. Dielectric layers are disclosed that cover the metal traces while leaving top surfaces of the contact pads exposed. Top surfaces of the dielectric layers may be arranged to be coplanar with top surfaces of the contact pads to provide electronic substrates having generally planar top faces. Bottom faces of electronic substrates may include mounting pads that are coplanar with additional dielectric layers. Methods are disclosed that include forming dielectric layers to cover contact pads and metal traces, and removing surface portions of the dielectric layers until the contact pads are accessible through the dielectric layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.