Method of testing semiconductor package
US11769698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2021 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Mar 21, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/214
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of testing a semiconductor package is provided. The method includes forming a first metallization layer, wherein the first metallization layer includes a first conductive pad electrically connected to a charge measurement unit and a charge receiving unit; performing a first test against the charge measurement unit through the first conductive pad to determine whether breakdown occurs in the charge measurement unit; and in response to determining that no breakdown occurs in the charge measurement unit, forming a second dielectric layer over the first metallization layer, wherein a portion of the first conductive pad is exposed from the second dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.