Semiconductor device structure with metal gate stack
US11769819B2 · kind B2 · utility
2Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2020 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | May 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a metal gate stack over the semiconductor substrate. The semiconductor device structure also includes a spacer element over a sidewall of the metal gate stack. The spacer element is doped with a dopant, and the dopant reduces a dielectric constant of the spacer element. An atomic concentration of the dopant decreases along a direction from an inner surface of the spacer element adjacent to the metal gate stack towards an outer surface of the spacer element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.