Huiling Shang
41Patents
8h-index
51Co-inventors
78Inventor score
Filing activity: Jan 16, 2001 → Apr 1, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7244958B2 | Integration of strained Ge into advanced CMOS technology | Electricity | 75 | Expired |
| US8592264B2 | Source-drain extension formation in replacement metal gate transistor device | Electricity | 16 | Active |
| US8080838B2 | Contact scheme for FINFET structures with multiple FINs | Electricity | 16 | Active |
| US8928086B2 | Strained finFET with an electrically isolated channel | Electricity | 15 | Active |
| US7449782B2 | Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby | Electricity | 13 | Expired |
| US9190520B2 | Strained finFET with an electrically isolated channel | Electricity | 13 | Active |
| US7521376B2 | Method of forming a semiconductor structure using a non-oxygen chalcogen passivation treatment | Electricity | 8 | Expired |
| US7387925B2 | Integration of strained Ge into advanced CMOS technology | Electricity | 8 | Active |
| US11121236B2 | Semiconductor device with air spacer and stress liner | Electricity | 5 | Active |
| US6803266B2 | Process for passivating the semiconductor-dielectric interface of a MOS device and MOS device formed thereby | Emerging Cross-Sectional Technologies | 5 | Expired |
| US8232599B2 | Bulk substrate FET integrated on CMOS SOI | Electricity | 5 | Active |
| US9029913B2 | Silicon-germanium fins and silicon fins on a bulk substrate | Electricity | 4 | Active |
| US7078300B2 | Thin germanium oxynitride gate dielectric for germanium-based devices | Emerging Cross-Sectional Technologies | 4 | Expired |
| US6603181B2 | MOS device having a passivated semiconductor-dielectric interface | Emerging Cross-Sectional Technologies | 3 | Expired |
| US7790538B2 | Integration of strained Ge into advanced CMOS technology | Electricity | 3 | Active |
| US11444179B2 | Isolation structures in multi-gate semiconductor devices and methods of fabricating the same | Electricity | 3 | Active |
| US9536900B2 | Forming fins of different semiconductor materials on the same substrate | Electricity | 3 | Active |
| US11769819B2 | Semiconductor device structure with metal gate stack | Electricity | 2 | Active |
| US8685818B2 | Method of forming a shallow trench isolation embedded polysilicon resistor | Electricity | 2 | Active |
| US11948998B2 | Isolation structures in multi-gate semiconductor devices and methods of fabricating the same | Electricity | 1 | Active |
| US10868174B1 | Devices with strained isolation features | Electricity | 1 | Active |
| US8933528B2 | Semiconductor fin isolation by a well trapping fin portion | Electricity | 1 | Active |
| US7682968B2 | Self-aligned metal to form contacts to Ge containing substrates and structure formed thereby | Electricity | 1 | Active |
| US8927361B2 | High threshold voltage NMOS transistors for low power IC technology | Electricity | 1 | Active |
| US11854896B2 | Semiconductor device with S/D bottom isolation and methods of forming the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.