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US11775444B1 · kind B1 · utility

0Cited by

10References

17Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Willm Hinrichs · Holzgerlingen, DE
Markus Kaltenbach · Holzgerlingen, DE
Simon H. Friedmann · Eppelheim, DE
Joerg Deutschle · Winnenden, DE
Thomas Koehler · Holzgerlingen, DE

Key dates

Filing date	Mar 15, 2022
Grant date	Oct 3, 2023
Priority date	—
Expiry date	Mar 15, 2042

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/684
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Driving address translations in a microprocessor system by sending a rejected Lx+1 cache request from a first set of caches of a first level Lx to a central request unit, transferring an Lx+1 cache request having a translation of a virtual address into a physical address stored in a first buffer, from the central request unit to the at least one Lx+1 cache, and keeping an Lx+1 cache request lacking a translation of a virtual address into a physical address stored in the first buffer, pending in the central request unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.