System and method for round robin arbiters in a network-on-chip (NoC)
US11782834B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 11, 2022 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Mar 11, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a network-on-chip (NoC) interconnect connected to one or more agents with multiple input ports, one or more switches are provided with a round robin arbiter constructed to use representations of the input ports and, in some embodiments, the current round robin state, as thermometer codes. By using thermometer code to represent port information, the correspondence to the current input and the current state to be granted can be rapidly determined through a simple two-step AND and XOR operations. With such a simple logical procedure, the number of steps to make the determination, and therefore the energy required, can be reduced by log 2(n) steps or up to 43%. Using thermometer code reduces the number of computations required. Hence, the number of logic circuit elements required to carry out the calculation is reduced, shrinking the floorplan area needed for the arbiter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.