Package comprising integrated devices coupled through a metallization layer

US11784157B2 · kind B2 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• Li-Sheng Weng · San Diego, US
• Charles David Paynter · Encinitas, US
• Ryan David Lane · San Diego, US
• Jianwen Xu · Chandler, US
• William Stone · San Diego, US

Key dates

• Filing date: Jun 4, 2021
• Grant date: Oct 10, 2023
• Expiry date: Sep 3, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15192
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A package comprising a first integrated device comprising a plurality of first pillar interconnects; an encapsulation layer at least partially encapsulating the first integrated device; a metallization portion located over the first integrated device and the encapsulation layer, wherein the metallization portion includes at least one passivation layer and a plurality of metallization layer interconnects, wherein the plurality of first pillar interconnects is coupled to the plurality of metallization layer interconnects; and a second integrated device comprising a plurality of second pillar interconnects, wherein the second integrated device is coupled to the plurality of metallization layer interconnects through a plurality of second pillar interconnects and a plurality of solder interconnects.