Monolithic integration of diverse device types with shared electrical isolation

US11784189B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Francois Hebert · San Mateo, US
• Handoko Linewih · Singapore, SG

Key dates

• Filing date: Aug 20, 2021
• Grant date: Oct 10, 2023
• Expiry date: Aug 27, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/811

Abstract

Structures including III-V compound semiconductor-based devices and silicon-based devices integrated on a semiconductor substrate and methods of forming such structures. The structure includes a substrate having a device layer, a handle substrate, and a buried insulator layer between the handle substrate and the device layer. The structure includes a first semiconductor layer on the device layer in a first device region, and a second semiconductor layer on the device layer in a second device region. The first semiconductor layer contains a III-V compound semiconductor material, and the second semiconductor layer contains silicon. A first device structure includes a gate structure on the first semiconductor layer, and a second device structure includes a doped region in the second semiconductor layer. The doped region and the second semiconductor layer define a p-n junction.