Integrated circuit device
US11784213B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2021 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Sep 30, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/684
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device including a first electrode layer including a first metal and having a first thermal expansion coefficient; a dielectric layer on the first electrode layer, the dielectric layer including a second metal oxide including a second metal that is different from the first metal, and having a second thermal expansion coefficient that is less than the first thermal expansion coefficient; and a first stress buffer layer between the first electrode layer and the dielectric layer, the first stress buffer layer including a first metal oxide including the first metal, and being formed due to thermal stress of the first electrode layer and thermal stress of the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.